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Original Articles

Circuit analysis of BiCMOS gate delay

Pages 1-12 | Published online: 10 Nov 2010
 

Abstract

A circuit analysis of the BiCMOS switching transient is presented. The BiCMOS pull-up delay as a function of transistor parameters and power supply voltage is evaluated. The analytical predictions are compared with SPICE circuit simulation. Good agreement between the model and SPICE simulation is obtained. Twodimensional numerical device simulation is used to examine the physical insight into BiCMOS device operation.

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